Embodiments of the present invention relate to data communication and more particularly to deterministic data transfer between connected devices.
Most computer systems are formed of components coupled together using one or more buses, which are used to transmit information between the various system components. Present bus standards such as the Peripheral Component Interconnect (PCI) Specification, Rev. 2.1 (published Jun. 1, 1995) provide a multi-drop bus in which multiple devices are coupled to the same bus. Accordingly, it is easy to read or write to devices on the same bus. However, as bus interface speeds increase, bus architectures are moving away from multi-drop architectures towards point-to-point architectures. In point-to-point architectures, peer-to-peer communication becomes more difficult as synchronization, ordering, and coherency of such communications becomes more difficult. One example of a point-to-point architecture is a PCI Express™ architecture in accordance with the PCI Express Base Specification, Rev. 1.0 (published Jul. 22, 2002).
Communication between serially connected devices typically involves buffering data to be sent in a transmitting device and then sending the data, for example, in packetized form to a receiving device. The two communicating devices, which may be different integrated circuits of a system, are typically connected via off-chip links to communicate data between the devices. Such links can be used for inter-processor communication or communication from an agent to memory, as two examples. Often data from a clock-forwarded off-chip interface can arrive at an agent such as a processor (and more particularly into a processor's core) non-deterministically, that is, at an arbitrary execution cycle. Non-deterministic operation can cause various problems. For example, debug of an integrated circuit on a high-speed tester becomes difficult if the chip does not respond identically each time test code is run. Likewise, debug on a system platform becomes difficult if the chip contains intrinsic execution uncertainties. Also, scan techniques such as restart/replay can become confused. Furthermore, it is impossible to create a lockstep system, where two processors operate side-by-side and constantly compare results. A need thus exists for improved system operation, including deterministic transmission of data.